GitHub

A VS Code extension bundling all the things I want in a System Verilog IDE.

The language server provides a couple of features from the Verible SystemVerilog productivity suite right in the editor.
IEEE

A Multi-Expert Large Language Model Architecture for Verilog Code Generation

Abstract: Recently, there has been a surging interest in using large language models (LLMs) for Verilog code generation. However, the existing approaches are limited in terms of the quality of the ...