IEEE

A 1–8b Reconfigurable Digital SRAM Compute-in-Memory Macro for Processing Neural Networks

This work presents a 1-8b reconfigurable digital SRAM compute-in-memory (CIM) macro, which significantly improves array utilization and energy efficiency under different input and weight ...
IEEE

A Compute-in-Memory Annealing Processor With Interaction Coefficient Reuse and Sparse Energy Computation for Solving Combinatorial Optimization Problems

Since combinatorial optimization problems (COPs) are a class of non-deterministic polynomial-time (NP)-hard problems, it is impracticable to solve them in brute-force searches, which results in high ...